Entity: hyper_pipe_root

Diagram

Port name	Direction	Type
clk	input
rst	input
clk_datamover	input
rst_datamover	input
in_sop	input
in_eop	input
in_data	input	[511:0]
in_empty	input	[5:0]
in_valid	input
out_data	input	[511:0]
out_valid	input
out_sop	input
out_eop	input
out_empty	input	[5:0]
out_almost_full	input
esram_pkt_buf_wren	input
esram_pkt_buf_wraddress	input	[PKTBUF_AWIDTH-1:0]
esram_pkt_buf_wrdata	input	[519:0]
esram_pkt_buf_rden	input
esram_pkt_buf_rdaddress	input	[PKTBUF_AWIDTH-1:0]
esram_pkt_buf_rd_valid	input
esram_pkt_buf_rddata	input	[519:0]
reg_in_sop	output
reg_in_eop	output
reg_in_data	output	[511:0]
reg_in_empty	output	[5:0]
reg_in_valid	output
reg_out_data	output	[511:0]
reg_out_valid	output
reg_out_sop	output
reg_out_eop	output
reg_out_empty	output	[5:0]
reg_out_almost_full	output
reg_esram_pkt_buf_wren	output
reg_esram_pkt_buf_wraddress	output	[PKTBUF_AWIDTH-1:0]
reg_esram_pkt_buf_wrdata	output	[519:0]
reg_esram_pkt_buf_rden	output
reg_esram_pkt_buf_rdaddress	output	[PKTBUF_AWIDTH-1:0]
reg_esram_pkt_buf_rd_valid	output
reg_esram_pkt_buf_rddata	output	[519:0]
## Instantiations